Skip to main content

Google Is Developing Two Chips

·755 words·4 mins
Google Pixel Watch Tensor
Table of Contents

Google’s Pixel Watch lineup didn’t start smoothly. The first generation launched a year late, powered by an outdated Exynos SoC that was both slow and inefficient compared to competitors. Thankfully, things improved with Pixel Watch 2, which switched to Qualcomm’s Snapdragon W5 Gen 1 platform. The same chip powers Pixel Watch 3, but with Qualcomm yet to release a new wearable platform, many are wondering: What’s next for Google’s smartwatches?

Thanks to significant leaks from Google’s gChips division, documents seen by Android Authority reveal that Google is preparing a custom Tensor wearable chip set to launch in 2026 alongside the Pixel Watch 5.

Google’s Future Wearable Tensor Chip
#

The new chip is codenamed NPT—likely short for Newport Beach, keeping with Google’s California beach naming theme (e.g., Tensor G5 was codenamed Laguna Beach). It’s expected to debut in 2026, alongside the Tensor G6. Since the leaked document dates back to early 2023, these plans could still change.

The only confirmed detail so far is the CPU configuration:

  • 1× Arm Cortex-A78
  • 2× Arm Cortex-A55

Interestingly, Google also evaluated RISC-V as a possible option, but given recent Android kernel changes, this seems unlikely.

At first glance, these CPU cores look dated — the Cortex-A55 dates back to 2017! Yet, this mirrors a broader wearable SoC trend, as both Qualcomm and Samsung use older CPU cores on modern process nodes. For example, Qualcomm’s Snapdragon W5 Gen 1 uses Cortex-A53 cores from 2012 but is built on a 4nm process. Similarly, Samsung’s recent Exynos W1000 features a nearly identical setup: one Cortex-A78 and four Cortex-A55 cores.

The manufacturing process node is still unknown, but efficiency is key for wearables. Since Google’s Tensor G6 is built on a 3nm process, it’s likely NPT will use the same technology.

One major question mark is the modem. Most smartwatch chips integrate an onboard modem to reduce power consumption, but Google currently lacks such a solution. Whether Google develops one or partners with another vendor remains to be seen.

What we do know: Google will leverage this chip to make the Pixel Watch more intelligent. Unlike typical wearables that lack strong compute performance, Google could integrate application-specific hardware accelerators, unlocking new experiences. Exactly what those experiences will be is worth watching.


Google’s Next Smartphone Chip: Tensor G5
#

Alongside wearables, Google is also preparing its next flagship smartphone chip — the Tensor G5, expected to debut in Pixel 10 next year. Unlike previous models, Tensor G5 is fully designed in-house by Google, moving away from Samsung’s heavy involvement. This shift is expected to make the chip more competitive against industry leaders like Apple and Qualcomm.

Leaked internal documents confirm several key details about Tensor G5:

CPU Cluster Upgrade
#

The Tensor G4 brought only modest improvements over G3, with just a 6% multi-core boost. For Tensor G5, Google is reshaping the CPU cluster again:

  • 1× Cortex-X4 prime core (instead of upgrading to Cortex-X925)
  • 5× Cortex-A725 middle cores (up from 3× Cortex-A720 in G4)
  • 2× Cortex-A520 efficiency cores (down from 4 in G4)

This layout should bring a significant multi-core uplift, though the unchanged prime core may limit peak performance.

Google Tensor Roadmap


GPU: A Big Change
#

Surprisingly, Tensor G5 will no longer use Arm’s Mali GPUs. Instead, it integrates an Imagination Technologies (IMG) DXT-48-1536 GPU running at 1.1 GHz.

Two key features stand out:

  • Ray tracing support (a first for Tensor chips)
  • GPU virtualization, enabling accelerated graphics in virtual machines

This marks a major shift in Google’s GPU strategy.

Google Tensor Roadmap


TPU Improvements
#

AI remains the cornerstone of Tensor chips. Tensor G5 features a faster TPU, with nearly 40% higher TOPS, though real-world tests suggest only a 14% speedup. It also introduces:

  • A small embedded RISC-V core inside the TPU for unsupported operations
  • On-device training support, expanding AI use cases

Google Tensor Roadmap


Process Node & Size
#

Tensor G5 is built on TSMC’s 3nm N3E node, the same as Apple’s A18 Pro. Interestingly, G5 has a larger die size (121 mm²) compared to Apple’s 105 mm² A18 Pro.


Final Thoughts
#

On paper, Tensor G5 may not look groundbreaking, but Google’s real strength lies in software integration. Just as previous Tensor chips delivered advanced AI features despite modest raw performance, the G5’s true value will be how it powers next-generation Pixel experiences.

Meanwhile, the wearable Tensor chip (NPT) signals Google’s serious investment in the Pixel Watch ecosystem, promising smarter and more capable wearables by 2026.

Together, these chips show that Google is no longer just following industry trends — it’s building the hardware foundation for its AI-first future.

Related

英伟达和谷歌拥抱RISC-V
·133 words·1 min
RISC-V Google NVIDIA
C++日志库glog简介
·59 words·1 min
Glog Google
Google发布开源AI文本水印工具
·23 words·1 min
Google Synthid Watermarking